The Role of Programming Models for Performance Portable Heterogeneous Programs
On the trail to Exascale - Maximising the impact of the latest HPC developments in your organisation
Date: 31 May 2023 at 09:00
Location: Science and Technology Facilities Council, Sci-Tech Daresbury, Keckwick Lane, Cheshire, Daresbury, WA4 4FS
This workshop aims to bring together key stakeholders (players) from industry, academia, public sector as well as representatives of UK and US National Laboratories to raise the awareness of UK industry and public sector in extreme scale computing. It will present the latest advances in scalable programming approaches, such as SYCL and Kokkos, to enable the increase in performance, portability and productivity, and scalable libraries such as HYPRE and MFEM that enable scalability on a variety of accelerated computer architectures, along with particular case studies and examples demonstrating the advantages of the above approaches. It will offer an opportunity for discussion with the workshop attendees around how these can be used and how they can enable them to tackle a wide spectrum of problems that are of interest to them. The aim is to inform wider audiences and enable the uptake of extreme scale computing by industry, public sector and other key stakeholders.
The Role of Programming Models for Performance Portable Heterogeneous Programs
There is a huge diversity in the processors used to power the leading supercomputers. Despite their differences in how they need to be programmed, these processors lie on a spectrum of design. GPU-accelerated systems are optimised for throughput calculations providing high memory bandwidth; CPUs provide deep and complex cache hierarchies to improve memory latency; and both use vector units to bolster compute performance. Competitive processors are available from a multitude of vendors, with each becoming more heterogeneous with every generation. This gives us as a HPC community a choice, but how do we write our applications to make the most of this opportunity?
Our high-performance applications must be written to embrace the full ecosystem of supercomputer design. They need to take advantage of the hierarchy of concurrency on offer, and utilise the whole processor. And writing these applications must be productive because HPC software outlives any one system. Our applications need to address the “Three Ps” and be Performance Portable and Productive.
This talk will highlight the opportunities this variety of heterogeneous architectures brings to applications, and how application performance and portability can be rigorously measured and compared across diverse architectures. It will share a strategy for writing performance portable applications and present the roles that ISO languages C++ and Fortran, as well as parallel programming models and abstractions such as OpenMP, SYCL and Kokkos play in the ever changing heterogeneous landscape.
Post-event blog
You can read a write up of the On the trail to exascale event in this UKRI Hartree Centre blog. One sound bite it captures from my talk (borrowed from that news article) was:
“There is a need to plan for and invest in continual diversity and to demand cross-industry, open standard approaches, we need to work together.”