Performance Portability across Diverse Architectures
Knowledge Quarter Codes Technical Social
Date: 17 June 2020 at 16:00
Location: University College, London
The range of computer architectures used in supercomputers today is growing in diversity. The Exascale machines due to be online by next year (2021) showcase the variety of architectures we need to think about: high-performance CPUs and GPUs from different hardware vendors. In the UK, the Tier-2 systems showcase diversity. As HPC specialists, we need to write and maintain our codes to make sure they work efficiently on this wide and changing range of hardware. We want to write performance portable codes that run well everywhere. To do this we need robust ways to measure and evaluate performance portability, and we need to use write codes using programming models which are performant and portable. Encouraging diversity in hardware is crucial too, one of the goals of the Isambard project which explores building production-ready supercomputers using Arm processors and evaluating them on the . This talk will discuss the ongoing research into performance portability from the High Performance Computing Research Group at the University of Bristol, including the Isambard Tier-2 project.